0目的與範圍Purpose & Scope
當同一顆 die 在 WT(CP)與 FT 兩站、甚至在 RT/HT/LT 多個溫度 corner 下被重複測試相同或高度相關的項目時,若能證明「後站不會抓到前站漏抓的 fail」,即可將該測項自後站移除或降頻抽測,達成 Test Time Reduction(TTR)。 When the same die is tested for identical or highly correlated items at both WT (CP) and FT — often across multiple temperature corners (RT/HT/LT) — proving that "the downstream stage never catches a fail the upstream stage missed" lets that test be removed or sampled downstream, achieving Test Time Reduction (TTR).
本文件的目的是把這個判斷「模板化、流程化」,避免僅憑幾百顆樣本「沒看到 fail」就下結論的常見統計誤區。核心主張:只看 Bin(Pass/Fail)層級不夠,必須下探到 Parameter(實際量測值)層級,才能看見「兩站都 Pass,但 margin 正在被吃掉」的隱性風險,也才能用遠小於 Bin-level 所需的樣本數,取得具科學依據的結論。 This document turns that judgment into a repeatable template and process, avoiding the common statistical fallacy of concluding "safe to remove" from a few hundred zero-fail samples. Core argument: Bin-level (Pass/Fail) data alone is not enough — analysis must go down to the Parameter level (actual measured values) to expose the hidden risk of "both stages Pass, but margin is eroding," and to reach a scientifically defensible conclusion with a far smaller sample size than Bin-level analysis requires.
本 SOP 適用於同一顆 die/同一 unit 在不同測試站別(WT↔FT)或同站不同溫度 corner 間,測試邏輯或量測參數具有實質重疊的候選測項評估。不適用於製程站之間(如 WAT/E-test 與 WT)的相關性分析,該類分析目的與統計假設不同,需另訂流程。 This SOP applies to evaluating candidate test items where the same die/unit is tested with substantially overlapping logic or measured parameters across stages (WT↔FT) or across temperature corners at the same stage. It does not apply to correlation analysis between process-control stages (e.g., WAT/E-test and WT) — those have different objectives and statistical assumptions and require a separate procedure.
1名詞定義Definitions
| 詞彙Term | 定義Definition |
|---|---|
| WT / CP | Wafer Test/Circuit Probe,晶圓階段測試。Wafer Test / Circuit Probe — die-level test performed at the wafer stage. |
| FT | Final Test,封裝後終測。Final Test — post-package test. |
| RT / HT / LT | 常溫/高溫/低溫測試 corner。Room / High / Low temperature test corners. |
| Bin-level | 僅記錄該測項 Pass/Fail 與 Bin 碼的屬性資料(attribute data)。Attribute data recording only Pass/Fail and bin code for a test item. |
| Parameter-level | 記錄該測項實際量測數值(如電壓、電流、頻率)的連續資料(variables data),可回推分布、margin、趨勢。Variables data recording the actual measured value (voltage, current, frequency, etc.), enabling analysis of distribution, margin, and trend. |
| Incremental Catch | 前站 Pass、但後站該測項判定為 Fail 的顆數 —— 是「該測項仍有價值、不可移除」的直接證據。Units that Pass upstream but Fail this item downstream — direct evidence the test still adds value and should not be removed. |
| Escape Rate | 若移除後站測項,實際會被漏測的不良率估計值,常以 DPPM 表示。The estimated defect rate that would escape undetected if the downstream test were removed, typically expressed in DPPM. |
| DPPM | Defects Per Million,百萬顆中的不良數。Defects Per Million — defective units per million. |
| Redundancy Index | = 1 − (Incremental Fail 數/該測項總 Fail 數),越接近 1 代表後站該測項越冗餘。= 1 − (incremental fails / total fails for that item); closer to 1 means the downstream test is more redundant. |
| Guardband / Margin | 量測值與 spec limit 之間的距離,常以 σ 為單位表示(距離幾個標準差)。Distance between a measured value and its spec limit, typically expressed in σ (standard deviations). |
| Cpk / Ppk | 製程能力指數,衡量分布相對 spec limit 的集中與偏移程度。Process capability index, measuring how tightly and centrally a distribution sits within its spec limits. |
| PAT | Part Average Testing,以群體統計分布動態收緊 spec limit 的方法(參考 AEC-Q001)。Part Average Testing — dynamically tightens spec limits based on the population's statistical distribution (see AEC-Q001). |
| Skip-lot / Skip-test | 以固定比例(如 1-in-N)抽測取代 100% 全測的抽樣策略。A sampling strategy that replaces 100% testing with a fixed ratio (e.g., 1-in-N). |
| STDF(PTR/FTR) | 業界通用之 Standard Test Data Format;PTR 記錄 parametric 量測值,FTR 記錄 functional pass/fail 結果。The industry-standard Standard Test Data Format; PTR records parametric measurements, FTR records functional pass/fail results. |
| Die-level 追溯 | 透過 Wafer ID + X,Y 座標或封裝序號,將同一顆 die 在 WT 與 FT 的資料點對點配對。Die-level traceability — pairing the same die's WT and FT data point-to-point via Wafer ID + X,Y coordinates or package serial number. |
| PCM / WAT | Process Control Monitor/Wafer Acceptance Test,晶圓上刀模/scribe-line 製程監控結構的電性測試,反映製程本身(而非產品電路)的變異,通常比 WT/FT 資料更早出現異常訊號。Process Control Monitor / Wafer Acceptance Test — electrical tests on scribe-line/kerf process-monitor structures that reflect variation in the process itself (not the product circuit), typically surfacing anomalies earlier than WT/FT data. |
| Gauge R&R / MSA | Measurement System Analysis,量化量測系統本身貢獻的變異(repeatability + reproducibility)佔總變異的比例,用以判斷一組量測數據是否值得信任。Measurement System Analysis — quantifies how much of total variance comes from the measurement system itself (repeatability + reproducibility), used to judge whether a set of measurements can be trusted. |
| CQC | Customer Quality Complaint,客戶端提出的品質相關客訴事件。Customer Quality Complaint — a quality-related complaint raised by a customer. |
| Stop-on-fail / Continue-on-fail | 測試程式的執行模式:前者一遇 fail 就中止該顆 die 的後續測試(後面測項無資料);後者即使 fail 仍會繼續執行並記錄所有測項。Test-program execution modes: the former halts a die's remaining tests on the first fail (later items have no data); the latter keeps running and recording every item even after a fail. |
| Trim | 出廠前對電路做的一次性校準(如燒 fuse/寫 OTP 調整 trim code),用以修正製程變異;trim 前與 trim 後同一測項的量測值代表不同的物理狀態。A one-time factory calibration of the circuit (e.g., blowing fuses / writing OTP trim codes) that corrects for process variation; the same item's value before and after trim represents different physical states. |
2流程總覽Process Overview
主流程分七個 Phase(Phase 0–6),前一 Phase 的輸出是後一 Phase 的輸入。Phase 0 是不需要資料就能先判斷的「硬性守則」(規格強制項目、零覆蓋保護、量測系統有效性),先擋掉不該評估的候選;Phase 3 則是本 SOP 的統計核心,把 Bin-level、Parameter-level 與(適用時的)溫度 Corner 線性驗證拆成並行的證據線。額外的 Phase 7(虛線/Optional)不是循序步驟,而是客訴事件觸發時才啟動的查證程序。 The main process runs across seven phases (Phase 0–6), each phase's output feeding the next. Phase 0 applies hard rules that need no data at all (spec-mandated items, the zero-coverage guard, measurement-system validity) to screen out candidates that should never be evaluated for removal; Phase 3 is the statistical core, splitting Bin-level, Parameter-level, and (where applicable) temperature-corner linearity validation into parallel lines of evidence. The extra Phase 7 (dashed / Optional) isn't a sequential step — it's a verification procedure that only runs when a customer complaint triggers it.
3Phase 0 — 前置強制檢查Phase 0 — Hard Gates
在投入任何資料分析之前,先用三個不需要統計證據的「硬性守則」篩掉不該評估移除的候選 —— 這些守則不會被任何統計結果推翻,任一項不通過即直接保留。 Before investing in any data analysis, screen out candidates that should never be evaluated for removal using three hard rules that need no statistical evidence at all — no statistical result can override these; failing any one of them means the item is kept, full stop.
3.1 規格/驗證標準強制項目3.1 Spec / Qualification-Mandated Items
先查客戶 datasheet/spec 書、PPAP 承諾項目,或適用的驗證標準(如 AEC-Q100、JEDEC)測項清單 —— 若該測項被這些文件明確、逐項寫死要求執行,則無論 Incremental Catch 或相關性統計結果多乾淨,都不可移除,因為這已經是契約或驗證等級的承諾,不是工程風險判斷可以覆蓋的範圍。 Check the customer datasheet/spec, PPAP commitments, or the applicable qualification standard's test list (e.g., AEC-Q100, JEDEC) first. If the item is explicitly, individually mandated by one of these documents, it cannot be removed no matter how clean the Incremental Catch or correlation statistics look — that is a contractual or qualification-level commitment, outside the scope of an engineering risk judgment.
在 Phase 1 的測試對應矩陣中新增一欄「規格來源」,逐項標註是否對應到客戶 spec 條款編號或標準條文;找不到明確來源時,預設視為「可評估」而非「強制」,但需在決策紀錄中註明查證過程。 Add a "Spec source" column to the Phase 1 test mapping matrix and tag each item against the corresponding customer spec clause or standard section. When no explicit source can be found, default to "evaluable" rather than "mandated," but record the verification steps taken in the decision log.
Spec 書只定義「客戶端量得到」的參數(如 pin 腳上的 VOH、IDDQ),但這些參數是由電路內部的某個節點或機制「產生」出來的——兩者之間存在必然的物理/電路關係(例如某內部 bias 電流或 reference 電壓直接決定了外部某個 spec 參數的中心值與變異)。這類內部測項即使從未出現在 spec 書、PPAP 或驗證標準的條文裡,一旦被移除,等同間接拿掉了對客戶 spec 參數的保證。因此判斷「是否強制」時,不能只查「這個測項名稱有沒有出現在 spec 文件裡」,還要往回問一句:這個測項量到的東西,是不是某個 spec 參數背後的物理成因?如果是,就應該比照 §3.1 的強制項目處理,需要電路設計端(而非只有測試工程)一起確認才能核准移除。 The spec sheet only defines parameters the customer can measure (e.g., VOH, IDDQ at a pin), but those parameters are physically produced by some internal circuit node or mechanism — a necessary physical/circuit relationship connects the two (an internal bias current or reference voltage, for instance, may directly set the center value and variation of an external spec parameter). Such internal test items may never appear in the spec sheet, PPAP, or qualification standard's text, yet removing one is effectively removing the guarantee behind a spec'd parameter. So don't just check "does this item's name appear in the spec document" — also ask: is what this item measures the physical cause behind some spec parameter? If so, treat it the same as a §3.1 mandated item, and get sign-off from circuit design (not test engineering alone) before approving its removal.
3.2 零覆蓋守則3.2 Zero-Coverage Guard
Redundancy 分析的前提是移除的必須是重複的覆蓋,而不是唯一的覆蓋。無論統計證據多強,決策都不可以讓任一 spec 參數在整個流程(所有站別 × 所有溫度 corner)中變成完全沒有測試點覆蓋。 Redundancy analysis only makes sense when what's being removed is duplicate coverage, never the only coverage. No matter how strong the statistical evidence, a decision may never leave any spec parameter with zero test coverage across the entire flow (every stage × every temperature corner).
在核准移除前,回頭檢查 Phase 1 測試對應矩陣:此參數在移除後,是否仍有至少一個站別、至少一個溫度 corner 繼續測試?若答案是否,此候選直接不成立,不需要再進行 Phase 3 的統計分析。 Before approving a removal, re-check the Phase 1 test mapping matrix: after removal, does this parameter still have at least one stage, at least one temperature corner, still testing it? If the answer is no, the candidate is invalid outright — no need to proceed to the Phase 3 statistical analysis.
3.3 溫度 Corner 移除與線性假設3.3 Temperature-Corner Removal & the Linearity Assumption
跨站(WT↔FT)冗餬與跨溫度 corner(RT/HT/LT)冗餘是兩個不同的問題,不能互相替代。若候選是「移除某個溫度 corner 的測試」(例如認為 RT 已涵蓋、HT/LT 可省略),必須額外驗證該參數在溫度間的關係,不能只憑「數值看起來隨溫度平滑變化」就假設線性成立 —— 部分電性參數(如漏電流)隨溫度呈指數關係而非線性,兩點內插/外插在這類參數上會嚴重低估風險。這條證據線在 Phase 3(§6.3)中與 Bin-level、Parameter-level 並列,僅在候選涉及溫度 corner 移除時適用。 Cross-stage (WT↔FT) redundancy and cross-temperature-corner (RT/HT/LT) redundancy are two different questions and cannot substitute for each other. If the candidate is "remove testing at one temperature corner" (e.g., assuming RT already covers it, so HT/LT can be skipped), the temperature relationship must be separately validated — never assume linearity just because values "look smooth across temperature." Some electrical parameters (e.g., leakage current) follow an exponential, not linear, relationship with temperature, and two-point interpolation/extrapolation badly underestimates risk for those. This evidence line sits alongside Bin-level and Parameter-level in Phase 3 (§6.3), and applies only when the candidate involves removing a temperature corner.
3.4 量測系統有效性(Contact/Repeatability/儀器極限)3.4 Measurement System Validity (Contact / Repeatability / Instrument Limits)
在信任任何相關係數或 Cpk 之前,必須先確認量測系統本身是有效的 —— 否則相關性可能只是反映「兩站共享同樣的量測雜訊」,或者反過來,真正的實體冗餘被雜訊蓋過而誤判為不相關。三個常見盲點: Before trusting any correlation coefficient or Cpk, first confirm the measurement system itself is valid — otherwise a correlation might just reflect "both stages sharing the same measurement noise," or conversely, real physical redundancy gets buried under noise and wrongly read as unrelated. Three common blind spots:
- Contact 品質:探針卡/socket 接觸不良(接觸電阻異常、需要 retouch)會在資料中製造假的變異。務必監控 retest rate、contact resistance 等指標,異常批次要先排除或重測,不能直接拿來做冗餘分析。 Contact quality: poor probe-card/socket contact (elevated contact resistance, needing a retouch) manufactures fake variance in the data. Monitor retest rate, contact resistance, and similar indicators; exclude or retest anomalous lots before using them for redundancy analysis.
- 測試程式 Repeatability:同一顆 die 在同一站、同一條件下重複測試,量測值的變異(Gauge R&R 中的 repeatability 分量)若太大,會直接壓低任何跨站相關係數的上限 —— 這種情況下低 r 不代表「兩站不相關」,可能只是「量測本身不夠穩定」。 Test-program repeatability: retest the same die at the same station under the same conditions — if the measurement variance (the repeatability component of a Gauge R&R study) is too large, it caps how high any cross-stage correlation can possibly read. A low r here doesn't mean "the two stages are unrelated" — it may just mean "the measurement itself isn't stable enough."
- 測試項特性與儀器極限:部分參數天生量測雜訊大(如極低漏電流量測接近儀器解析度極限),或該儀器的量測範圍/解析度本身就無法穩定分辨 die 間的真實差異 —— 這種情況下,相關性分析的結論本來就不可靠,不該用來支持移除決策。 Test-item characteristics and instrument limits: some parameters are inherently noisy to measure (e.g., ultra-low leakage current near the instrument's resolution floor), or the instrument's range/resolution simply can't reliably distinguish real die-to-die differences. In that case the correlation analysis's conclusion is unreliable to begin with and shouldn't be used to support a removal decision.
應先改善量測系統(如更換探針卡、調整測試條件、提高儀器解析度),而不是急著用「相關性不夠」的結論來保留或移除測項 —— 因為那個結論本身可能只是雜訊,不是物理事實。 Fix the measurement system first (a different probe card, adjusted test conditions, higher-resolution instrumentation) — don't rush to use a "correlation isn't high enough" conclusion to keep or remove a test, because that conclusion might just be noise, not physics.
上面的 %R&R 門檻要「信任」,本身也需要足夠的重複測試次數才能估得準 —— 這裡常用反查 Chi-Square(reverse chi-square)的方法:母體變異 σ² 的信賴區間可以用樣本變異 s²(n 次重複量測算出)與卡方分布連結;要反過來問「要多少次重複量測,才能讓估出來的 σ 夠精準」,就是把這個關係式倒過來解 n。 Trusting the %R&R threshold above requires enough repeat measurements to estimate it precisely in the first place — a common method here is reverse (inverse) chi-square sample sizing: the confidence interval for a population variance σ² connects to the sample variance s² (from n repeat measurements) via the chi-square distribution. Asking "how many repeats do I need for a precise-enough σ estimate" means solving that relationship backward for n.
4Phase 1 — 測項盤點與配對Phase 1 — Test Inventory & Mapping
建立「測試對應矩陣」,列出 WT/FT、各溫度 corner 下的所有測項,並標註其類型。這一步決定了後面能不能做 Parameter-level 分析 —— 純 Bin-only 的測項(如某些 digital functional test)天生沒有 parameter 可看,只能走 Bin-level 途徑;量測型測項(parametric)則兩條途徑都要走。 Build a "Test Mapping Matrix" listing every test item across WT/FT and all temperature corners, tagged by type. This step determines whether Parameter-level analysis is even possible downstream — purely Bin-only items (e.g., certain digital functional tests) have no parameter to examine and can only follow the Bin-level path; parametric items must follow both paths.
對應 STDF Test NumberMaps to STDF Test Number
對應 STDF Test NumberMaps to STDF Test Number
量測項目名稱Measured item name
RT / HT / LT
Bin-only / Parametric
LSL / USL、單位LSL / USL, unit
電性等效 / 邏輯等效 / 製程等效Electrical / logic / process equivalence
A / B / C(見 Phase 4)A / B / C (see Phase 4)
客戶條款/標準條文,或「無」(見 Phase 0)Customer clause / standard section, or "none" (see Phase 0)
若為內部節點,寫出它決定哪個 spec 參數(見 Phase 0 §3.1)If an internal node, name the spec parameter it physically determines (see Phase 0 §3.1)
是/否(見 Phase 0 §3.3)Yes / No (see Phase 0 §3.3)
是/否;若是,是否涉及 trim 溫度係數Yes / No; if yes, does it involve the trim's temperature coefficient
兩測項「名稱相似、spec limit 相同」不代表等效 —— 務必確認量測電路路徑、負載條件、溫度 corner 是否真的一致,否則配對本身就不成立,後面的統計分析會建立在錯誤前提上。 Two items with similar names and identical spec limits are not necessarily equivalent — always confirm the measurement circuit path, load conditions, and temperature corner truly match. Otherwise the pairing itself is invalid and every downstream statistical analysis rests on a false premise.
蒐集資料前務必確認測試程式的執行模式:stop-on-fail(一顆 die 一旦在某測項 fail,程式就中止,後面的測項完全不會執行)跟 continue-on-fail(即使前面 fail,後面測項仍照跑並記錄)差異很大——也要留意這是「跨站(WT/FT)」還是「同站內部」的執行模式,視實際測試流程而定。若程式是 stop-on-fail,那些「fail 點之後」的測項對該顆 die 而言根本沒有資料,不是「沒有 fail」,是「壓根沒測到」。把這種資料缺失誤當成「無 fail 證據」放進 Incremental Catch 或相關性分析,會嚴重低估真實的漏測風險。務必:(1) 先確認候選測項配對是否受 stop-on-fail 影響,受影響的話優先取得 continue-on-fail(或 debug/engineering mode)資料再分析;(2) 資料萃取時明確區分「Pass」「Fail」「未執行(No data)」三種狀態,不要把「未執行」當「Pass」處理。 Before collecting data, confirm the test program's execution mode: stop-on-fail (once a die fails one item, the program halts and every later item never runs) versus continue-on-fail (later items still run and get recorded even after an earlier fail) make a big difference — and check whether this applies across stages (WT/FT) or only within a station, depending on the actual flow. Under stop-on-fail, items after the fail point simply have no data for that die — that's not "no fail," it's "never tested." Treating this missing data as "no-fail evidence" in Incremental Catch or correlation analysis badly underestimates the real escape risk. Always: (1) check whether the candidate pair is affected by stop-on-fail, and if so, get continue-on-fail (or debug/engineering-mode) data before analyzing; (2) when extracting data, explicitly distinguish "Pass," "Fail," and "not executed (no data)" — never treat "not executed" as "Pass."
部分測項的量測值只有在電路完成 trim/校準之後才有物理意義(如 bandgap trim 後的參考電壓、振盪器 trim 後的頻率);trim 前與 trim 後的同一個測項,代表完全不同的東西,不能混在一起做相關性或 Cpk 分析。資料收集前必須先確認:這個測項的數值是 trim 前還是 trim 後?跨站比較時,兩邊是否都基於同一個 trim 狀態(同一次 trim、同一組 trim code)?沒先釐清就直接拿來算 r,很容易把「trim 前的雜訊」跟「trim 後的真實表現」混在一起,得出失真甚至方向相反的結論。 Some test items' measured values are only physically meaningful after the circuit has been trimmed/calibrated (e.g., a bandgap's reference voltage after trim, an oscillator's frequency after trim); the same item pre-trim and post-trim represents two completely different things and shouldn't be mixed together for correlation or Cpk analysis. Before collecting data, confirm: is this item's value pre-trim or post-trim? When comparing across stages, are both sides based on the same trim state (the same trim pass, the same trim codes)? Skipping this check and computing r directly is a good way to blend "pre-trim noise" with "post-trim real performance" and get a distorted, sometimes inverted, conclusion.
若候選測項是trim 相關(本身在驗證 trim 是否成功,或量測值直接受 trim code 影響),或候選是「整個站別」的移除(例如打算整站跳過某個溫度 corner,而非單一測項),在跑 Phase 3 統計分析之前,就要先把這類候選特別標記出來、額外審慎評估 —— 尤其是trim 相關的溫度係數(TC)。原因:trim 通常只在單一溫度(常見是 WT 端的常溫)執行一次,之後所有溫度/站別的表現,都仰賴這次 trim 對溫度係數的補償是否準確;若拿掉了驗證這個 TC 補償的測項,等於拿掉了唯一能發現「trim 補償失準」的機會。而且這不是漸進式風險 —— 一旦 trim 演算法或製程本身出現偏移,可能整批甚至整個 lot 的溫度補償同時失準,造成的 loss 遠比單一測項的移除大得多(呼應 §6.2(g) 提到的製程漂移風險)。因此候選是 trim 相關或整站移除時,不能只靠 Phase 3 的統計證據做決定,必須先由電路/trim 設計端確認移除後是否仍有其他機制能發現 TC 補償失準(見 Phase 0 §3.1 物理關聯 spec 參數、§3.3 溫度 Corner 線性)。 If a candidate item is trim-related (it verifies whether trim succeeded, or its value is directly set by the trim code), or the candidate is removing an entire station (e.g., skipping a whole temperature corner rather than one test item), flag it for extra scrutiny before running the Phase 3 statistical analysis at all — especially trim-related temperature coefficients (TC). The reason: trim is usually performed once, at a single temperature (commonly room temperature at WT), and every subsequent temperature's/stage's behavior depends on that trim's TC compensation being accurate. Removing the item that verifies this TC compensation removes the only chance to catch a compensation failure. And this isn't a gradual risk — if the trim algorithm or the process itself drifts, an entire batch or lot's temperature compensation can fail at once, producing a loss far larger than removing any single test item (echoing the process-drift risk noted in §6.2(g)). So when a candidate is trim-related or involves removing a whole station, Phase 3's statistical evidence alone isn't enough to decide — circuit/trim design must first confirm some other mechanism can still catch a TC compensation failure (see Phase 0 §3.1's physically-linked spec parameter and §3.3's temperature-corner linearity).
5Phase 2 — 資料萃取與 Die-level 追溯Phase 2 — Data Extraction & Die-Level Traceability
從 STDF 的 PTR(Parametric Test Record,量測值)與 FTR(Functional Test Record,pass/fail)萃取資料,並透過 Wafer ID + X,Y 座標(WT 端)對應到封裝序號/Lot-Unit ID(FT 端),做到 die-level 一對一配對,而不是只在 lot 層級做良率比較。 Extract data from STDF's PTR (Parametric Test Record, measured values) and FTR (Functional Test Record, pass/fail), then map Wafer ID + X,Y coordinates (WT side) to package serial number / Lot-Unit ID (FT side) to achieve die-level one-to-one pairing, rather than a coarse lot-level yield comparison.
- 沒有 die-level 追溯,就只能做 lot-level 的粗略良率相關性,無法算出「這一顆」在 WT 端的 margin 是否預示了它在 FT 端會出問題。 Without die-level traceability, you're limited to a rough lot-level yield correlation — you cannot determine whether "this specific die's" WT margin predicted an FT problem.
- 建議資料涵蓋期間至少橫跨數個 lot、不同時段(避免單一批次的偶發現象被誤判為通則),並記錄晶圓廠/測試機台/探針卡等潛在共變因子。 Data should span at least several lots across different time periods (so a one-off event in a single batch isn't mistaken for a general pattern), and should record potential confounders such as fab, tester, and probe card.
- Parametric 測項務必保留原始量測值(非僅 Pass/Fail flag),這是 Phase 3 做 Parameter-level 分析的前提。 Parametric items must retain the raw measured value (not just a Pass/Fail flag) — this is a prerequisite for the Phase 3 Parameter-level analysis.
6Phase 3 — 統計分析方法Phase 3 — Statistical Analysis Methods
這是整份 SOP 的核心:Bin-level 分析回答「有沒有看到 fail」,Parameter-level 分析回答「margin 有沒有在流失」,溫度 Corner 線性分析回答「未測的溫度點是否仍被可靠預測」。三者互補,而非其中一種可以取代另一種;溫度 Corner 線性分析僅在候選涉及移除溫度 corner 時才需要(見 Phase 0 §3.3)。 This is the core of the SOP: Bin-level analysis answers "did we see a fail?"; Parameter-level analysis answers "is margin eroding?"; temperature-corner linearity analysis answers "is the untested temperature point still reliably predicted?" All three are complementary — none replaces another; the temperature-corner line is only required when the candidate involves removing a temperature corner (see Phase 0 §3.3).
6.1 Bin-level(屬性資料)分析6.1 Bin-Level (Attribute Data) Analysis
對候選 pair 統計 Incremental Catch:WT Pass、FT 該測項 Fail 的顆數。若在觀察樣本中 Incremental Catch = 0,只能說「在這個樣本數下沒觀察到」,還不能說「風險為零」—— 這正是 Bin-level 方法的統計弱點:它是二元資料(attribute data),要把「零事件」轉換成「風險上界」,需要非常大的樣本數。 For each candidate pair, count Incremental Catch: units that Pass at WT but Fail this item at FT. An observed Incremental Catch of 0 only means "not observed at this sample size" — not "zero risk." This is the statistical weakness of Bin-level methods: because the data is binary (attribute data), converting a "zero-event" observation into a risk upper bound requires a very large sample size.
| 目標 incremental escape rateTarget incremental escape rate | 95% 信心所需 n(近似)Required n at 95% conf. (approx.) | 99% 信心所需 n(近似)Required n at 99% conf. (approx.) |
|---|---|---|
| 100 DPPM | ≈ 30,000 | ≈ 46,000 |
| 50 DPPM | ≈ 60,000 | ≈ 92,000 |
| 10 DPPM | ≈ 300,000 | ≈ 460,000 |
| 5 DPPM | ≈ 600,000 | ≈ 920,000 |
| 1 DPPM | ≈ 3,000,000 | ≈ 4,600,000 |
很多 TTR 提案只用幾百到幾千顆「零 fail」就主張可移除,但對照上表,這樣的樣本數大約只能支撐「escape rate 低於數千 DPPM」的信心水準 —— 對大多數量產品要求的 DPPM 等級而言遠遠不夠。這也是為什麼必須引入 Parameter-level 分析:它用連續資料,能以小得多的樣本數建立有效的統計論證。 Many TTR proposals claim "safe to remove" from a few hundred to a few thousand zero-fail units. But per the table above, that sample size only supports confidence in an escape rate below a few thousand DPPM — far short of the DPPM levels most production parts require. This is exactly why Parameter-level analysis is necessary: it uses continuous data to build a valid statistical case with a much smaller sample.
6.2 Parameter-level(變數資料)分析 —— 本 SOP 的重點6.2 Parameter-Level (Variables Data) Analysis — The Focus of This SOP
Bin-level 只看「有沒有跨過 spec limit」,看不到「距離 spec limit 還有多遠、這個距離是不是在縮小」。同樣是「WT、FT 都 Pass」的兩顆 die,一顆 margin 很寬、一顆貼著 FT limit,Bin-level 資料完全無法區分,但這正是後續製程漂移或環境應力(如封裝、burn-in、溫度循環)造成漏測的高風險族群。 Bin-level data only tells you whether a value crossed the spec limit, not how far from the limit it sits or whether that distance is shrinking. Two dies that both "Pass at WT and FT" can be indistinguishable at the Bin level — one with wide margin, one sitting right against the FT limit — yet the latter is exactly the high-risk population most likely to escape after downstream process drift or environmental stress (packaging, burn-in, temperature cycling).
(a) 相關性驗證 — Pearson / Fisher z(a) Correlation Validation — Pearson / Fisher z
對同一 parameter 在 WT、FT 兩站的量測值做相關係數 r 檢定,確認兩站量測確實反映同一物理量,且相關性穩定高於可接受下限 r_min(而非只看單次樣本的 r 剛好夠高)。前提是 Phase 0 §3.4 的量測系統有效性已經確認——量測雜訊過大時,算出來的 r 偏低不代表兩站真的不相關,只代表量測系統蓋過了訊號。 Test the correlation coefficient r between WT and FT measured values for the same parameter, confirming the two stages truly reflect the same physical quantity and that the correlation reliably exceeds an acceptable floor r_min (not just that a single sample's r happens to clear the bar). This assumes Phase 0 §3.4's measurement-system validity has already been confirmed — when measurement noise is too large, a low computed r doesn't mean the two stages are truly unrelated, only that the measurement system is drowning out the signal.
(b) Margin-to-limit(guardband)趨勢分析(b) Margin-to-Limit (Guardband) Trend Analysis
將每顆量測值換算成「距離 spec limit 幾個 σ」,畫出 WT margin 與 FT margin 的散佈圖與時間趨勢(如圖 6.2)。重點不是平均值夠不夠遠,而是尾端(tail)有沒有子族群持續逼近 limit —— 這類子族群常與特定站位、特定 lot、特定測試機台相關,Bin-level 的加總統計會把它們平均掉而看不見。 Convert each measured value into "distance from the spec limit in σ," then plot WT margin against FT margin and its trend over time (see Fig. 6.2). What matters isn't whether the average sits far enough away, but whether a tail sub-population keeps closing in on the limit — such sub-populations often correlate with a specific site, lot, or tester, and get averaged away and hidden in aggregate Bin-level statistics.
(c) Cpk/Ppk 站間比較(c) Cross-Stage Cpk/Ppk Comparison
(d) 變數抽樣法所需樣本數遠小於屬性抽樣(d) Variables Sampling Needs Far Fewer Samples Than Attribute Sampling
這是 Parameter-level 分析背後的統計原理:屬性資料(Pass/Fail)每顆只回傳 1 bit 資訊,要把「零事件」轉換成低 DPPM 等級的信心上界,天然需要極大樣本;變數資料(實際量測值)每顆回傳連續資訊(均值與變異數都在估計中被使用),可用統計容忍區間(statistical tolerance interval)方法,以遠小的樣本數(實務上常見 n = 30~200 等級)對母體比例做同等信心水準的宣稱。方法與 k-factor 查表請參考 ASTM E2586 / ISO 16269-6(見附錄);k-factor 背後「用卡方分布反查所需樣本數」的推導方式,見 §3.4 的反查 Chi-Square 說明。 This is the statistical principle behind Parameter-level analysis: attribute data (Pass/Fail) carries only 1 bit per unit, so converting a zero-event observation into a low-DPPM confidence bound inherently requires a huge sample. Variables data (actual measured values) carries continuous information per unit — both mean and variance are used in the estimate — so a statistical tolerance interval method can make an equivalent-confidence population claim with a far smaller sample (commonly n = 30–200 in practice). See ASTM E2586 / ISO 16269-6 for the method and k-factor tables (Appendix); for how those k-factors trace back to reverse-solving the chi-square relationship for sample size, see §3.4's reverse chi-square note.
(e) 全矩陣相關性 — 同站跨溫度 vs 跨站同溫度(e) Full Correlation Matrix — Same-Stage Cross-Temperature vs. Cross-Stage Same-Temperature
候選配對不該只鎖定「WT vs FT、同一溫度」這一組。同一參數實際上最多有六個量測點(WT-RT/WT-HT/WT-LT/FT-RT/FT-HT/FT-LT),應該用 (a) 的方法對所有存在的配對都算一次相關係數,畫出完整的相關矩陣,原因有二: Candidate pairs shouldn't be limited to "WT vs FT at the same temperature." A given parameter has up to six measurement points (WT-RT/WT-HT/WT-LT/FT-RT/FT-HT/FT-LT); use the method in (a) to compute a correlation coefficient for every pair that actually exists, and build the full correlation matrix. Two reasons:
- 同站跨溫度(如 WT-RT 對 WT-HT)本身可能就有很高的相關性 —— 這代表的是「溫度 corner 冗餘」而非「跨站冗餘」。這類配對即使 r 很高,也必須額外通過 §6.3 的線性/TC 模型驗證才能核准移除,因為相關係數高不代表關係是線性的,也不代表兩端物理機制相同。 Same-stage, cross-temperature pairs (e.g., WT-RT vs WT-HT) can themselves be highly correlated — that's temperature-corner redundancy, not cross-stage redundancy. Even with a high r, such pairs must still additionally pass the §6.3 linearity/TC-model validation before removal is approved, since a high correlation coefficient neither implies a linear relationship nor that both ends share the same underlying physics.
- 跨站同溫度(如 WT-RT 對 FT-RT)才是 (a)–(d) 處理的標準案例。矩陣中相關性偏低的配對,無論同站跨溫或跨站同溫,都應直接排除移除候選,不需要進到 Phase 4。 Cross-stage, same-temperature pairs (e.g., WT-RT vs FT-RT) are the standard case that (a)–(d) already cover. Any pair in the matrix with low correlation — same-stage or cross-stage — is disqualified as a removal candidate and does not proceed to Phase 4.
(f) Outlier Detection — 個體層級異常偵測(f) Outlier Detection — Individual-Level Anomaly Screening
高相關係數、良好線性都只是「母體層級」的證據,不保證沒有個別 die 是離群值 —— 樣本數一大,少數 outlier 對整體 r 或 R² 的影響會被稀釋,異常反而被平均掉而看不見。核准移除前,應在殘差上額外跑一次個體層級的異常偵測: A high correlation coefficient and good linearity are only population-level evidence — they don't guarantee no individual die is an outlier. As sample size grows, a handful of outliers get diluted in their effect on the overall r or R², averaging the anomaly away until it's invisible. Before approving removal, run an individual-level outlier-detection pass on the residuals:
- NNR(Nearest Neighbor Residual):把每顆 die 的量測值與晶圓上鄰近 die 的平滑預測值比較,殘差過大視為空間異常(典型的 Good-Die-in-Bad-Neighborhood 現象),能抓到單靠站間或溫度相關性看不出來的局部異常。 NNR (Nearest Neighbor Residual): compare each die's measured value against a smoothed prediction from its spatial neighbors on the wafer; a large residual flags a spatial anomaly (the classic "Good Die in Bad Neighborhood" pattern) — catching local anomalies that a stage- or temperature-correlation check alone would miss.
- DPAT(Dynamic Part Average Testing):不用固定 spec limit,改用每個 lot/wafer 自己的統計分布(mean ± kσ)動態計算限制;即使數值仍在 spec 內,只要明顯偏離同批分布就會被標記。 DPAT (Dynamic Part Average Testing): instead of a fixed spec limit, compute limits dynamically per lot/wafer from that batch's own statistics (mean ± kσ); a die can still be flagged for sitting well outside its own batch's distribution even while inside spec.
- 雙變量/多變量異常偵測(如 Mahalanobis 距離):單一參數看起來正常,不代表兩個相關參數的「組合」正常 —— 用 Mahalanobis 距離同時看多個維度,才能抓到只有在聯合分布上才顯形的離群點。 Bivariate/multivariate outlier detection (e.g., Mahalanobis distance): a value can look normal on each parameter individually yet be abnormal in the combination of two correlated parameters — Mahalanobis distance looks across multiple dimensions at once to catch outliers that only show up in the joint distribution.
這條檢查獨立於相關係數與線性驗證:任何一種方法標記出的 outlier 都應該讓該候選回頭複查,而不是被一個看起來很高的整體 r 值掩蓋過去。 This check is independent of the correlation coefficient and linearity validation. Any outlier flagged by any of these methods should send the candidate back for review, rather than being smoothed away by a reassuringly high aggregate r.
(g) 主動收緊前站 Limit(Guardbanding)作為 Enabler(g) Actively Tightening the Upstream Limit as an Enabler
有時候相關性不是天生就「夠高」,但仍然可以透過收緊前站(如 WT)的測試 limit,主動換取移除後站測試的空間。原理:用迴歸模型從前站量測值推算後站預期值,再加上預測區間(prediction interval)的安全緩衝;只要收緊後的前站 limit 距離這個緩衝夠遠,通過收緊後前站測試的 die,其後站預測值就能以目標信心水準保證落在後站 spec 之內。 Sometimes the raw correlation isn't naturally "high enough" on its own, but removal headroom can still be actively created by tightening the upstream (e.g., WT) test limit. The principle: use the regression model to project the expected downstream value from the upstream measurement, then add a safety buffer sized by the prediction interval. As long as the tightened upstream limit sits far enough beyond that buffer, any die passing the tightened upstream test is guaranteed — at the target confidence level — to land inside the downstream spec.
這個做法不是免費的:收緊 limit 會讓原本在舊 limit 內、新 limit 外的 die 在前站就被判退,即使它們原本在後站測試也會 Pass。決策時必須把「犧牲的前站良率成本」跟「移除後站測試省下的 test time」放在同一個 ROI 天平上比較(見 Phase 4 ROI 參考),而不是只看統計上站不站得住腳。當相關性 r 已經很高、殘差很小時,收緊的幅度通常很小、犧牲的良率可忽略;相關性普通時,才需要認真評估這筆交易划不划算。 This isn't free: tightening the limit means dies that would have passed the old limit but fall outside the new one get rejected upstream — even though they would have passed the downstream test. The decision must weigh "upstream yield sacrificed" against "test time saved by removing the downstream test" on the same ROI scale (see the Phase 4 ROI reference), not just whether the statistics hold up. When r is already high and the residual is small, the required tightening is usually tiny and the sacrificed yield negligible; when correlation is only moderate, this trade-off needs careful evaluation before committing to it.
收緊後的 limit,是根據「目前」的 Cpk/σ_residual 算出來的 guardband —— 這個假設不是永久成立的。一旦未來製程出現較大變異(Cpk 惡化、分布變寬或偏移),原本算好的緩衝可能不夠,而且因為後站測試已經移除,當下不會有任何機制能抓到這個 escape,等到問題被發現時,往往已經是一批甚至數批的 loss,遠比「多測一個已冗餬的測項」的成本高出許多。因此 §6.2(g) 的收緊 limit 方案,比單純的冗餘移除更依賴製程穩定度:除了大數據歷史分析之外,也必須掌握 PCM/WAT(製程監控/晶圓允收測試)與此參數的相關性,把它當作比 WT/FT 資料更早的製程異常訊號,並列為 Phase 5 SPC 監控清單中的必要項目,而不是選配。 The tightened limit's guardband is sized from the "current" Cpk/σ_residual — that assumption does not hold forever. If the process later shows larger variation (Cpk degrades, the distribution widens or shifts), the buffer sized for the old distribution may no longer be enough — and because the downstream test has already been removed, there is no mechanism left to catch that escape in real time; by the time it's discovered, the loss is often a full lot or several lots deep, far more costly than simply keeping "one already-redundant test." Because of this, the §6.2(g) tightened-limit approach depends on process stability more heavily than plain redundancy removal: beyond historical big-data analysis, also track the correlation between this parameter and PCM/WAT (Process Control Monitor / Wafer Acceptance Test), treat it as an earlier process-shift signal than WT/FT data, and make it a required — not optional — item on the Phase 5 SPC monitoring list.
6.3 溫度 Corner 冗餘分析(線性/TC 模型)6.3 Temperature-Corner Redundancy (Linearity / TC Model)
僅在候選屬於「移除某個溫度 corner 的測試」時才需要這條證據線(見 Phase 0 §3.3、§6.2(e));若候選單純是跨站(WT↔FT)冗餘、溫度 corner 不變,此節不適用。 This evidence line is only required when the candidate is "remove testing at one temperature corner" (see Phase 0 §3.3 and §6.2(e)); if the candidate is purely cross-stage (WT↔FT) redundancy with the temperature corner unchanged, this section does not apply.
線性假設成立後,用該模型從已測 corner 推算未測 corner 的預測區間(prediction interval),確認預測值距離該 corner 的 spec limit 仍有足夠 margin(同 §6.2(b) 的 guardband 概念,只是把「跨站」換成「跨溫度」);同時比較已測 corner 與(歷史或抽測)未測 corner 的相關係數 r,樣本數估算沿用 §6.2(a) 的 Fisher z 公式。 Once linearity holds, use the model to project a prediction interval from the tested corner(s) to the untested corner, and confirm the projected value still has adequate margin to that corner's spec limit (the same guardband concept as §6.2(b), with "cross-stage" swapped for "cross-temperature"). Also compare the correlation coefficient r between the tested corner and a historical or sampled untested corner; estimate the required sample size with the same Fisher z formula as §6.2(a).
6.4 判讀準則6.4 Interpretation Criteria
所有適用的證據線都要通過,才視為統計上站得住腳:Every applicable evidence line must pass before the conclusion is statistically sound:
- Bin-level:觀察期間內 Incremental Catch = 0,且樣本數達到該 Tier 要求的信心水準(見 6.1 表)。 Bin-level: Incremental Catch = 0 over the observation window, with sample size meeting the confidence level required for that Tier (see the table in 6.1).
- Parameter-level:r ≥ 該 Tier 的 r_min(若原始 r 不足,可改用 §6.2(g) 收緊前站 limit 後重新滿足此條件);margin 趨勢無逼近 limit 的尾端子族群;Cpk(FT) 與 Cpk(WT) 差異在可接受範圍內;相關矩陣中同站跨溫與跨站同溫配對皆已檢視(§6.2(e));殘差通過個體層級異常偵測,無 NNR/DPAT/雙變量離群點(§6.2(f))。 Parameter-level: r ≥ the Tier's r_min (if the raw r falls short, §6.2(g)'s tightened upstream limit can be used to satisfy this condition instead); no tail sub-population trending toward the limit; the Cpk(FT)–Cpk(WT) gap is within an acceptable range; every same-stage cross-temperature and cross-stage same-temperature pair in the correlation matrix has been reviewed (§6.2(e)); residuals pass individual-level outlier detection with no NNR/DPAT/bivariate outliers (§6.2(f)).
- 溫度 Corner 線性(僅溫度 corner 候選適用):線性假設經迴歸驗證成立,未測 corner 的預測區間距 spec limit 仍有足夠 margin。 Temperature-corner linearity (applies only to temperature-corner candidates): the linearity assumption is confirmed by regression, and the untested corner's prediction interval still clears its spec limit with adequate margin.
任一適用條件不成立 → 保留該測項,進入下一輪觀察期;全部適用條件皆成立 → 進入 Phase 4 依風險分級決定移除策略。 If any applicable condition fails → keep the test and continue observing; if every applicable condition holds → proceed to Phase 4 to decide the removal strategy by risk tier.
7Phase 4 — 風險分級與決策準則Phase 4 — Risk Tiering & Decision Rules
不是所有測項都要求同一信心水準。建議依「測項性質」與「終端應用」(消費性電子 vs. 車用/醫療等高可靠度應用,後者風險容忍度應大幅收緊)分三級: Not every test item warrants the same confidence level. Tier by test nature and end application (consumer electronics vs. automotive/medical high-reliability applications, where risk tolerance should be tightened substantially):
| Tier | 典型測項Typical items | Bin-level 要求Bin-level requirement | Parameter-level 要求Parameter-level requirement | 可行決策Feasible decision |
|---|---|---|---|---|
| A · 高可靠度關鍵A · High-Reliability Critical | 耐壓、漏電流上限、ESD 相關Voltage withstand, leakage current limit, ESD-related | 長期零 Incremental Catch(建議涵蓋完整產品生命週期樣本)Long-term zero Incremental Catch (cover the full product lifecycle sample) | r ≥ 0.95 且全程無 margin 趨近案例r ≥ 0.95, no margin-closing-in cases throughout | 原則保留;至多降頻抽測(如 1-in-5),不建議全移除Retain in principle; at most sample (e.g., 1-in-5) — full removal not recommended |
| B · 參數漂移型B · Parametric-Drift Type | Vth/Idsat/Freq bin 等Vth/Idsat/Freq bin, etc. | 近 12 個月零 Incremental CatchZero Incremental Catch over the trailing 12 months | r ≥ 0.85, |Cpk(FT) − Cpk(WT)| < 0.2 | Skip-lot 抽測 + SPC 監控,6 個月 pilot 後再評估移除Skip-lot sampling + SPC monitoring; reassess after a 6-month pilot |
| C · 純功能重複C · Pure Functional Duplicate | Digital scan/IO loopback 等邏輯完全等效項目Fully logic-equivalent items, e.g. digital scan / IO loopback | 零 Incremental Catch(較短驗證窗即可)Zero Incremental Catch (a shorter validation window suffices) | 不適用(非量測型)N/A (non-measurement type) | 可直接移除,建議保留低頻 health-checkCan be removed directly; keep a low-frequency health-check |
移除/降頻的財務效益 = 節省的 test time × tester 分攤成本 × 年產量;應與該測項一旦漏測造成的客訴/RMA/信賴度成本一併放入決策紀錄,供覆核與稽核追溯。若原始相關性 r 未達 r_min,可評估 §6.2(g) 收緊前站 limit 的方案:把「犧牲的前站良率」也換算成成本,一併放進同一個 ROI 天平比較。 Financial benefit of removal/sampling = time saved × allocated tester cost × annual volume. Log this alongside the potential complaint/RMA/reliability cost of an escape, for review and audit traceability. If the raw correlation r falls short of r_min, consider the §6.2(g) tightened-upstream-limit option: convert the sacrificed upstream yield into a cost too, and weigh it on the same ROI scale.
若候選涉及移除溫度 corner(Phase 0 §3.3),上表「Parameter-level 要求」欄位需再加上 §6.3 的溫度線性/TC 模型驗證通過,才可視為滿足該 Tier 的要求;純跨站候選則不受影響。 If the candidate involves removing a temperature corner (Phase 0 §3.3), the "Parameter-level requirement" column above also requires the §6.3 temperature-linearity/TC model validation to pass before the Tier's requirement is considered met; pure cross-stage candidates are unaffected.
8Phase 5 — Pilot 導入與監控Phase 5 — Pilot Rollout & Monitoring
即使統計驗證通過,也不建議直接 100% 移除,先以可回退的方式導入: Even after statistical validation passes, avoid an outright 100% removal — roll out in a reversible way first:
- Skip-lot / Skip-test:先以固定比例(如 1-in-N)抽測取代全測,而非直接關閉,觀察 3–6 個月的實際 escape 狀況。 Skip-lot / Skip-test: Replace full testing with a fixed sampling ratio (e.g., 1-in-N) first, rather than switching the test off outright, and observe actual escape behavior for 3–6 months.
- SPC 監控:對該測項的 margin/Cpk 建立管制圖,設定觸發線;一旦趨勢異常,自動恢復 100% 測試。若該測項是透過 §6.2(g) 收緊前站 limit 才核准移除,PCM/WAT 與此參數的相關性監控為必要項目,不是選配 —— 製程層級的變異通常會先反映在 PCM/WAT,而不是等到 WT/FT 資料才看得出來。 SPC monitoring: Build control charts for the item's margin/Cpk with trigger limits; automatically restore 100% testing if the trend goes out of control. If the item was approved for removal via the §6.2(g) tightened-upstream-limit route, monitoring the PCM/WAT correlation for this parameter is required, not optional — process-level variation typically shows up in PCM/WAT before it's visible in WT/FT data.
- 定期重新驗證:製程節點轉換、封裝廠變更、測試機台汰換等事件,皆應觸發該測項的重新驗證,不可視為一次性決策。 Periodic re-validation: process node changes, assembly house changes, tester replacement, and similar events should all trigger re-validation of the item — this is never a one-time decision.
9Phase 6 — 正式變更、文件化與回退機制Phase 6 — Formal Change, Documentation & Rollback
- Pilot 期間無異常 → 提報正式 ECN/測試流程變更,附上 Phase 3 的統計證據(Bin-level 表 + Parameter-level 圖表)與 Phase 5 的 pilot 紀錄。 No anomalies during the pilot → file a formal ECN / test flow change, attaching the Phase 3 statistical evidence (Bin-level table + Parameter-level charts) and the Phase 5 pilot record.
- 建立「回退觸發條件」清單(如:客戶端出現對應 fail mode、SPC 管制圖超出管制界線、良率異常事件),一旦觸發即自動恢復該測項,不需重新走完整審核流程;「客戶端出現對應 fail mode」的具體查證程序見 Phase 7。 Maintain a list of rollback trigger conditions (e.g., the corresponding fail mode appears in the field, an SPC control chart goes out of limits, a yield excursion), so hitting any of them automatically restores the test without a full re-approval cycle; see Phase 7 for the concrete verification procedure behind "the corresponding fail mode appears in the field."
- 所有決策需留存於變更歷史紀錄(見附錄範本),供未來稽核與新進工程師追溯決策脈絡。 Every decision must be retained in the change history log (see Appendix template) so future audits and new engineers can trace the reasoning.
10Phase 7(Optional)— 客訴快速查證與覆蓋回補Phase 7 (Optional) — Customer Complaint Quick Verification & Coverage Recovery
這個 Phase 是事件觸發,不是循序執行的步驟,所以不畫在 Section 2 的七階段管線圖裡 —— 它是 Phase 6 回退觸發條件中「客戶端出現對應 fail mode」這一項的具體操作程序,目標是縮短「客訴發生」到「查明是否誤移除、並恢復覆蓋」之間的時間。若組織尚未有正式的客訴(CQC)流程可對接,此 Phase 可暫不導入,故標示為 Optional。 This phase is event-triggered, not a sequential step, so it isn't drawn into Section 2's seven-phase pipeline — it's the concrete operating procedure behind Phase 6's rollback trigger "the corresponding fail mode appears in the field," aimed at shrinking the time between a complaint landing and confirming whether a test was wrongly removed and restoring coverage. If the organization has no formal CQC process to plug into yet, this phase can be deferred — hence marked Optional.
- CQC 進線:從客訴中萃取出對應的 fail mode/電性參數/bin。 CQC intake: extract the associated fail mode / electrical parameter / bin from the complaint.
- 比對決策紀錄:用該參數查詢 §11.2 的決策紀錄(Risk & Decision Log)—— 這個測項目前是「保留」「抽測」還是「已移除」? Cross-check the decision log: look up that parameter in the §11.2 Risk & Decision Log — is this test item currently "kept," "sampled," or "removed"?
- 若為已移除或抽測 → 立即觸發 Phase 6 的回退條件,恢復 100% 測試,不等待正式審核流程;根因調查與統計覆核可以並行進行,不應拖延恢復覆蓋的時間。 If removed or sampled → immediately trigger the Phase 6 rollback, restoring 100% testing without waiting for a formal review cycle; root-cause investigation and statistical re-validation can run in parallel and should not delay restoring coverage.
- 若查無對應測項(真正的覆蓋缺口)→ 這比「移除錯誤」更嚴重,代表整個流程從未涵蓋這個 fail mode,應立即評估新增測項,並回頭檢視 Phase 0 §3.2 零覆蓋守則當初是否有漏判。 If no corresponding test item exists at all (a genuine coverage gap) → this is more serious than a wrong removal — it means the flow never covered this fail mode. Immediately evaluate adding a new test item, and revisit whether Phase 0 §3.2's zero-coverage guard missed something.
- 回寫紀錄:把這次 CQC 事件與處置結果補進決策紀錄,作為未來稽核與流程覆核的依據。 Log it back: record the CQC event and its resolution in the decision log, as evidence for future audits and process reviews.
Step 2–3 的目的是在數小時內給出「是否恢復覆蓋」的答案,不是走完整套 Phase 0–6 的重新驗證。正式的根因分析、統計覆核、變更紀錄可以晚一點補齊,但「先恢復覆蓋」不應該被這些流程卡住 —— 這正是 Phase 6 把「客戶端出現對應 fail mode」單獨列為可跳過審核的回退觸發條件的原因。 Steps 2–3 exist to answer "should coverage be restored" within hours, not to re-run the full Phase 0–6 validation. Formal root-cause analysis, statistical re-validation, and change documentation can catch up later, but restoring coverage should never be blocked on them — this is exactly why Phase 6 calls out "the corresponding fail mode appears in the field" as a rollback trigger that skips the approval cycle.
11附錄Appendix
11.1 範本欄位 — 測試對應矩陣(Test Mapping Table)11.1 Template Fields — Test Mapping Table
11.2 範本欄位 — 決策紀錄(Risk & Decision Log)11.2 Template Fields — Risk & Decision Log
11.3 公式參考卡11.3 Formula Reference Card
11.4 延伸參考11.4 Further References
- Clopper–Pearson exact binomial confidence interval — 屬性資料信賴區間的精確解法。Clopper–Pearson exact binomial confidence interval — the exact-form confidence interval for attribute data.
- ASTM E2586 — Standard Practice for Calculating and Using Tolerance Factors for Statistical Tolerance Intervals.
- ISO 16269-6:2014 — Statistical interpretation of data, Part 6: Determination of statistical tolerance intervals.
- Nearest Neighbor Residual(NNR)— 以晶圓上鄰近 die 的平滑預測值篩選空間異常,常見於 Good-Die-in-Bad-Neighborhood 篩選文獻。Nearest Neighbor Residual (NNR) — screens spatial anomalies using a smoothed prediction from neighboring die on the wafer map; widely discussed in Good-Die-in-Bad-Neighborhood screening literature.
- Dynamic Part Average Testing(DPAT)— AEC-Q001 PAT 概念的延伸,以每 lot/wafer 自身分布動態計算限制而非固定 spec limit。Dynamic Part Average Testing (DPAT) — an extension of the AEC-Q001 PAT concept that computes limits dynamically from each lot/wafer's own distribution rather than a fixed spec limit.
- Mahalanobis, P. C. (1936) — 多變量離群偵測的基礎距離量測,將 z-score 概念推廣到相關變數的聯合分布。Mahalanobis, P. C. (1936) — the foundational distance measure for multivariate outlier detection, generalizing the z-score concept to the joint distribution of correlated variables.
- ILAC-G8:2019 — Guidelines on Decision Rules and Statements of Conformity,guardband/收緊 limit 決策規則的參考依據。ILAC-G8:2019 — Guidelines on Decision Rules and Statements of Conformity, a reference for guardband/limit-tightening decision rules.
- Cohen, J. (1988), Statistical Power Analysis for the Behavioral Sciences — 相關係數檢定力與樣本數公式(Fisher z)。power and sample-size formulas for correlation coefficients (Fisher z).
- AEC-Q001 — Guidelines for Part Average Testing(PAT),車用半導體 outlier 管控參考方法。AEC-Q001 — Guidelines for Part Average Testing (PAT); a reference method for outlier control in automotive semiconductors.