Reference pages for designing an automotive FMCW radar: from the antenna and RF front end to digital processing, and how the chip tests itself.
An interactive graph of the key circuits, parameters, tests and fab and package items across every page, and how they relate: what drives what, which test covers it, and where each item is explained or mentioned.
System · applicationsWhat the radar is for: animated ACC, pedestrian AEB, blind-spot / lane-change and rear cross-traffic scenarios with live point-cloud output; sensor classes, application-to-chip requirements, regulations and market trends.
End to endTx output power followed from the system spec through design, process, characterization, aging, guard bands and trim to production limits, safety and yield.
ReferenceAEC-Q100, JEDEC, ISO 26262, IEEE test standards, ESD, ETSI/FCC radio rules and interfaces, each linked to where it is used.
SiteWhat changed in each version of these notes.
Antenna and transition, Tx, chirp synthesis, Rx and I/Q downconversion, IF, ADC, DFE, radar processing, monitoring. Includes a chirp and link-budget calculator.
Module · antennaAntenna types, MIMO array, radome and bumper, module stack-up, end-of-line calibration and alignment, module failure modes. Includes a MIMO array calculator.
SafetySafety goals, fault classes, ASIL B metrics, FTTI, the safety mechanism behind each radar block, FMEDA and key-on tests.
Radio rulesBand plan and power limits in each market, what they demand from the chip, and how radar-to-radar interference appears and is mitigated.
Fractional-N PLL for the FMCW chirp: PFD, charge pump, loop filter, VCO, divider, ΣΔ and ramp generator; how it locks, frequency plan, VCO design and sub-bands, minimum voltage swings, issues and failure modes, and the PCM/WAT items behind its margins. Includes a frequency-plan calculator.
Power · safetySupply tree from battery to domains, LDO circuit and topologies with PSRR, bandgap reference, UV/OV window comparators, POR, over-current and over-temperature, power-up sequencing, failure modes, PCM/WAT items and production test. Includes an LDO and UV/OV calculator.
ThermalPower budget, junction-to-ambient thermal path, temperature effects on RF and lifetime, thermal management. Includes a junction-temperature calculator.
EMC · PIHow supply noise becomes radar spurs, power delivery, automotive EMC standards, design practices and typical problems. Includes a ripple-to-spur calculator.
RF circuitsLNA, mixer, PA and VGA: simplified schematics, design equations, detailed parameter tables with typical 77 GHz values, on-chip measurement, failure modes and PCM/WAT links. Includes a receive-chain noise-figure and IIP3 cascade calculator.
Baseband circuitsHigh-pass filter that equalises range, PGA and anti-alias filter, ΣΔ and SAR ADC design, decimation, key parameters, failure modes and PCM/WAT links. Includes an ADC SNR budget calculator.
Digital processingRange and Doppler FFTs, radar-cube memory, windowing, CFAR, angle estimation, data interfaces, and testing of the digital path. Includes a cube-memory and frame-time calculator.
Memory6T cell and margins, assists, ECC and redundancy; fault models and March tests; Vmin and shmoo; process causes, bitmaps and repair. Includes a cell-sigma calculator.
Design · sign-offSpecification to silicon: design stages, EM and post-layout simulation, mmWave pitfalls, tape-out readiness checklist and post-silicon steps.
On-chip stimulus, loopback paths, detector/ADC/counter measurement, trim and calibration feedback, and production test without mmWave instruments.
Trim · NVMeFuse, antifuse OTP and other NVM for trim; bit cell, sensing and shadow registers; the trim flow from measurement to lock; trim-word map, bit count, reliability and failure modes. Includes a trim-bit calculator.
Production test basicsDiode-method continuity, pass windows, pin-to-pin and power shorts, leakage, walking-Z tri-state test, contact resistance (Kelvin and two-current method), radar RF and supply pin handling, and Cres trend data.
Digital test · screening · qualificationFault models, scan and compression, at-speed test, IDDQ, memory and logic BIST, JTAG/IJTAG, HVST, VLV, burn-in, PAT/GDBN, AEC-Q100 qualification, and a scan test-time calculator.
ManufacturingThe full test flow in one section: a Mermaid flowchart from wafer to vehicle, the manufacturing logic behind the order, what each test insertion covers, and the fail-bin plan.
Test economicsTester rate, test time, multi-site and yield; RF ATE versus BIST-based test; levers to cut cost. Includes a cost-per-good-die calculator.
Lab · bring-upEvaluation-board setup and instruments, step-by-step first-silicon bring-up, measuring at 77 GHz on-wafer and over the air, automation and debugging. Includes an OTA and reflector calculator.
Lab · productionLab bench setups at 77 GHz, the PVT characterization matrix, lab↔ATE↔on-chip correlation, guard bands and test-limit setting, measurement system analysis. Includes a guard-band escape calculator.
What the fab measures on every wafer (PCM structures, WAT, breakdown voltages), how SPC control charts, run rules and Cpk keep the process in control, how each parameter links to the radar circuits, and how the data feeds test. Includes a Cpk calculator.
Fab · yieldReticle repeats, CMP centre and edge rings, scratches, clusters, one-sided gradients and test-site lookalikes: what each wafer-map pattern points to in the fab, which tool settings to check, and how to confirm the root cause.
Yield · qualityYield models, bin Pareto, SYL/SBL limits, DPPM and escapes, 8D for customer returns, failure-analysis techniques. Includes a die-yield calculator.
Fan-out (eWLB), flip-chip, antenna-in-package and launch-on-package for radar; RDL, bump and ball dimensions; eleven failure modes from solder fatigue to RF drift, with the test that accelerates each; and what the current ADAS market demands.
AssemblyFlip-chip and fan-out assembly step by step, RDL build-up, bumps and balls, 77 GHz specifics, in-line inspection, assembly defects and MSL. Includes an RDL microstrip calculator.
Qualification · FAAEC-Q100 stress tests with conditions and sample sizes (TC, HAST/THB, autoclave, HTSL, HTOL, ELFR), setting conditions from the mission profile, pass criteria, and CSAM, X-ray and cross-section analysis. Includes a mission-profile calculator.
ProtectionHBM, CDM and latch-up targets, the on-chip ESD network, the design window, protecting 77 GHz pins, latch-up prevention and failure signatures.
ReliabilityMission profile, HCI, BTI, TDDB and electromigration, accelerated tests and FIT, and what ages in each radar block. Includes an acceleration-factor calculator.
Abbreviations: see the glossary (376 terms, also at the end of each page).